A highly self-motivated, innovative, and adaptable software design engineer with over 26 years experience gained working for several leading companies. Experienced in the development and debug of complex OO designs. Demonstrates strong focus on results and has excellent problem solving skills.
- Software experience: many years experience in developing software primarily in C, but also experienced in OO: C++ and Java.
- DSP experience: interfaced FPGAs with DSP subsystems as well as writing and debugging DSP firmware for those subsystems.
- Embedded Processors: Responsible for writing the boot and application software for a number of FPGA system-on-chip solutions that included embedded processors. Also responsible for the design of these FPGA solutions, along with debugging the systems on the board.
- Systems: experienced with customer requirements capture, requirements development, and system architecture design during work in the systems division of Motorola.
- Programming: C, C++, Java, Android
- Scripting: Perl, Tcl/Tk, Bash
- Operating systems: Linux (SuSE, Ubuntu, Centos), Windows
- Configuration control: CVS, Subversion, Clearcase
- 2011: SNT: "IPv6 for Engineers"
- 2010: Spirent TestCenter
- 2009: SNT: "IPsec for Engineers"
- 2007: Oxford University Mobile and Wireless Communications
- 2006: QA: "C++ for C programmers"
- 2003: Learning Tree: “Advanced Perl Programming”
- 2002: “Telelogic UML for Real Time Systems”
- 1999: Cadence Signal Processing Worksystem
- BSc (Hons) in Electrical and Electronic Engineering: 1st class 1981 - 1985 Surrey University, Surrey, UK
- 3 ‘A’ levels: Maths (A), Further Maths (A), Physics (A); 9 ‘O’ levels
- Professional member of the Institute of Engineering and Technology (IET), 1991
- Member of MENSA, 1991